Happy New Year everyone! I hope your holiday period was less mired by illness than mine. One of the benefits of not feeling up to leaving the house was that I had time to make a demo video for my Glitch Delay Eurorack module.
The effect is designed around the Teensy 3.6 dev board. I designed the PCB in Eagle and had a small batch manufactured. This is very cheap to do nowadays, only a couple of pounds per board.
The effect consists of a standard delay line, or delay buffer, with multiple read heads that each read the audio in a different way. There is a feedback path, so the effected signal can be feedback into its self.
There are 2 types of read head:
Loop heads – These heads loop small sections of audio. There are 3 of these. One that plays the audio an octave lower, one at the original octave, and one an octave higher. The size of each of these loops can be adjusted (size dial), as can the amount the loops move each time the loop starts again (jitter dial)
Reverse head – This head plays the buffer in reverse at the original octave.
The top white button allows you to set a tap tempo. This forces the looping heads to jump to a new position on every beat.
The bottom white button is the ‘freeze’. This freezes the write head. No new audio will be written into the buffer, the old audio will remain. This essentially ‘locks-down’ the audio, so it can be tweaked without the buffer changing.
How can I build one?
The source code for the firmware running on the Teensy 3.6, and the schematics for the PCB are available on GitHub here
I shall post soon with more details of how to go about creating your own.
Can I use this in software?
Yes! I’ve ported the code to the JUCE framework. You can compile it yourself or download the executables from the GitHub here.
Future plans:
There are still some issues to resolve. The output can be a little noisy. This noise comes from the 5v offset applied to the incoming audio. This is mainly a gain-staging issue, and could be resolved by having an additional potentiometer to scale the amount of bias applied to the incoming signal. There is another issue where the module occasionally fails to power up. I believe this is due to occasions where the 12v line takes a little time to stabilise, which results in the 5v regulator supplying the Teensy with a voltage of less than 5v for a short period, which causes the Teensy to crash. I have a workaround for this in mind though.
I plan to build an expander module which will connect via I2C which will add CV control of many of the parameters. Check back for updates..
Leave a Reply